Search found 417 matches

by tvrfan
Mon Jan 02, 2012 1:12 am
Forum: EECGeeks
Topic: Automatic disassembly discussion
Replies: 42
Views: 22888

Re: Automatic disassembly discussion

Shame, 'cos I would share the info..... the A9L doesn't scare me anymore - I've even cracked the sneaky way the code modifies the stack to allow for different numbers of parameters to be sent to subroutines.... I haven't bothered with some of the advanced event queuing (yet). I see the test 8065 bin...
by tvrfan
Sun Jan 01, 2012 11:50 pm
Forum: EECGeeks
Topic: Automatic disassembly discussion
Replies: 42
Views: 22888

Re: Automatic disassembly discussion

OK..... I have several 8061 disassemblies/listings, including the A9L I also have my very simple box listing too, if anyone is interested in a 'base' setup (no EGO, leaded gas, V6, manual, twin VAF as standard - UK Ford Granada 2.8, 1985) Does anyone have a good quality 8065 multibank disassembly ? ...
by tvrfan
Sat Dec 31, 2011 4:11 pm
Forum: EECGeeks
Topic: Automatic disassembly discussion
Replies: 42
Views: 22888

Automatic disassembly discussion

Guys, I know this is mentioned in the thread below, "ISO as complete a dis-assembly as possible", but I think it's worth a separate topic. I have written a semi automatic disassembler, which is able to do fairly well from a 8061 binary, without too many clues. It's designed so that with the results ...
by tvrfan
Fri Dec 30, 2011 3:29 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

On my old box (from 1985 by the way), the only thing driven by the low speed output is the fuel pump relay. Everything else is done via the HSO. In fact in the code, all the various output routines call the same subroutine to write to the HSO queue. On the A9L, this is a sequential injection setup, ...
by tvrfan
Thu Dec 29, 2011 8:37 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

cgrey8 wrote:What is STO?
Oh dear, I didn't even notice THAT cockup. Apologies.....

STO = self test out, which isn't even the right one.

It *should* read SPOUT = Spark Out, throughout that post.

(and just in case, PIP = Profile Ignition Pickup)

It must be old age ..... (slinks off in embarrassment)
by tvrfan
Thu Dec 29, 2011 5:44 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

Times - My old box only uses 16 bit times, but having studied the A9L a little, it uses 24 bit times in its 'software' queue and its local copy of IOTIME, and then has an extra bit of check logic when it reads/writes out to the hardware 16 bit system to keep it all straight. It could be ODB as you s...
by tvrfan
Thu Dec 29, 2011 4:20 pm
Forum: EECGeeks
Topic: tick conversion for A9L injector pw
Replies: 3
Views: 2736

Re: tick conversion for A9L injector pw

I am fairly certain they fire once per 720 or crank rotation. This is supported by the injector timing tables using values greater than 360. Not to mention, two injection events would mitigate a lot of the emission benefit of SEFI, and also double the 'off' time of the injector, reducing its capaci...
by tvrfan
Thu Dec 29, 2011 4:16 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

Unless you're bit banging outputs, I can't think of a situation you would want to read the I/O timer directly. EFI-Unlimited Actually I would argue with that because all of the pulse width outputs (Idle valve, injectors) DO keep their last output time so that the pulse width can be accurately track...
by tvrfan
Thu Dec 29, 2011 4:09 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

There is no processing latency to account for....... The addition and subtraction of ticks may be calibrated latency in the input or output circuitry. BrianEFI-Unlimited Sorry Brian, that's what I meant, but I wasn't very clear. Latency in the processing circuitry (and perhaps in the pickups themse...
by tvrfan
Wed Dec 28, 2011 11:49 pm
Forum: EECGeeks
Topic: tick conversion for A9L injector pw
Replies: 3
Views: 2736

Re: tick conversion for A9L injector pw

This may be a silly suggestion, but...

Is it because the injectors get fired TWICE per actual firing cycle ???
(I believe they do work that way.)
by tvrfan
Wed Dec 28, 2011 11:42 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

OK, I rescanned Tom Cloud's document..... His words from the doc are - "The clock signal period, called one state time, equals three oscillator periods". "The CAM file rotates one position per state time, so it takes 12 state events for the holding buffer to access all 12 registers. Therefore the ti...
by tvrfan
Wed Dec 28, 2011 4:33 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

There's a question from that info..... Assuming the actual logic of the 8061s are all the same, it shouldn't matter WHAT speed the xtal is running, as everything HSI/HSO is sync'd to the I/O timer. That is, code should always add the same amount (in IO ticks) for the HSO to cycle, as that should be ...
by tvrfan
Tue Dec 27, 2011 4:18 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

OOPs, as EFI-unlimited says, the output queue is NOT a FIFO, every slot is scanned in a loop. Sorry bout that. For output timing, the code in my box (at 7.5Mhz) checks that there is always at least 42 clock ticks to go before output event. If there isn't, it ADDS 42 clock ticks (~200us). I assume th...
by tvrfan
Mon Dec 26, 2011 11:08 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

It's actually simpler than that.... every HSO output request (i.e. state change request) carries with it - 1. event time 2. channel no 3. on or off (flag) 4 interrupt or not (flag). Time is written into register '0xE' , state,chan no, int flag, are written into register '0xF' So the code writes even...
by tvrfan
Mon Dec 26, 2011 2:10 am
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

Actually the STO events can be set anytime in the future, within reason. Both HSI and HSO have a 12 slot FIFO. Good question, as to why, but I suspect it's ease of timing. The outputs on mine (ISC and TRIP) are set interrupt on the "OFF" event, triggering the code to restart the output processing, w...
by tvrfan
Sat Dec 24, 2011 9:37 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

the EEC in my (very old) 1995 2.8i (European Granada, basic setup, no EGO, etc) has only 4 interrupts, and one of those is for the plug in Calibration Console, so in reality it uses only 3 for engine. 1. Timer overflow. 2. High speed in. (ignition etc) 3. High speed out. 1. Timer overflow - on mine,...
by tvrfan
Thu Dec 22, 2011 11:34 pm
Forum: EECGeeks
Topic: How are interrupts setup on Intel 806x microcontrollers?
Replies: 35
Views: 12993

Re: How are interrupts setup on Intel 806x microcontrollers?

I agree with shaker666. I've programmed a few low level microprocessors, and there's no fixed rules across them all. Looking at the actual EEC code though, notice that interrupt routines never call DI, but do sometimes call EI, but mostly RETEI when they complete. To me, this says "one int at a time...
by tvrfan
Tue May 17, 2011 2:57 am
Forum: EECGeeks
Topic: Code patterns for fuel and spark tables lookup ?
Replies: 10
Views: 6079

Re: Code patterns for fuel and spark tables lookup ?

Good question, but I have to say I haven't really gone that way [yet]. Sorry.

I was especially interested in understanding how the code worked, probably because I'm too much of a code geek...

I'll have a think about the idea though.... I guess I'm half way there if the disassembly
works....


A.
by tvrfan
Sun May 15, 2011 5:24 pm
Forum: EECGeeks
Topic: CMP and the carry flag
Replies: 31
Views: 14578

Re: CMP and the carry flag

I've been fiddling with emulators too, as well as intelligent disassemblers (see 'A9L discrepancy' for my latest unfinished listing). The 8096 doco does pretty much nail the logic, because it does say it's a BORROW flag for subtraction and compares. I cheated in my home made emulator, it seems to wo...
by tvrfan
Sun May 15, 2011 4:55 pm
Forum: EECGeeks
Topic: Code patterns for fuel and spark tables lookup ?
Replies: 10
Views: 6079

Re: Code patterns for fuel and spark tables lookup ?

OK then, attached is where I'm up to with the A9L. This printout is produced by a tool I've been working on for a long time, on and off. It can resolve names for straight and indexed variables, and adds a 'C' like program comment to aid understanding - it also can do embedded variables, with a suita...
by tvrfan
Sun May 15, 2011 4:44 pm
Forum: EECGeeks
Topic: A9L discrepancy
Replies: 10
Views: 5428

Re: A9L discrepancy

Duh.....stupid of me not to see that.... Thanks !!!

Amended above post......
by tvrfan
Sun May 15, 2011 12:25 am
Forum: EECGeeks
Topic: ISO as complete a dis-assembly as possible
Replies: 20
Views: 8173

Re: ISO as complete a dis-assembly as possible

Hey guys, want to check this file out ?

It's the results of a few years of my labour, on a very simple EEC iV binary...
only 8k, but does the job.

Ford Granada 1985 Uk.

It has TWIN VAFS as standard (yes really !)
by tvrfan
Sun May 15, 2011 12:18 am
Forum: EECGeeks
Topic: A9L discrepancy
Replies: 10
Views: 5428

Re: A9L discrepancy

My copy of A9L code looks like this....with extra comments 84f5: a1,f0,00,18 ldw R18,f0 R18 = 0xf0; 84f9: b3,01,20,20,1a ldb R1a,[2020] R1a = [2020]; 84fe: a2,15,1c ldw R1c,[R14++] R1c = [R14++]; 8501: c2,19,1c stw R1c,[R18++] [R18++] = R1c; 8504: e0,1a,f7 djnz R1a,84fe R1a--; if (R1a != 0) goto 84f...
by tvrfan
Sun May 15, 2011 12:07 am
Forum: EECGeeks
Topic: Code patterns for fuel and spark tables lookup ?
Replies: 10
Views: 6079

Re: Code patterns for fuel and spark tables lookup ?

Actually, I reckon you can sort of do it, but you need to be sneaky. I've spotted that the actual code used to read tables and functions doesn't change much, right from early boxes like mine (1985 Ford Granada, UK), through to A9L and things like the EARS binary. this is because what the code does i...
by tvrfan
Sun May 15, 2011 12:01 am
Forum: EECGeeks
Topic: Reading binary files from chips for EEC4
Replies: 14
Views: 11072

Re: Reading binary files from chips for EEC4

For just a straight read of the ROM, there were plans on the web for a simple home made cicuit, called the EECSUCKA I think - it used two TTL chips, and a bit of software for a PC.

A.
by tvrfan
Sat May 14, 2011 11:58 pm
Forum: Tuning the EEC....
Topic: Why TP voltage does not matter
Replies: 40
Views: 20935

Re:

Hey Guys, (I'm new to forum, but not EEC stuff). My understanding of RATCH is that it is the MINIMUM voltage ever reached by the TPS sensor. Because of manufacturing tolerances, and real life wear etc. This value probably stays pretty stable for a particular vehicle, but not across multiple vehicles...
by tvrfan
Sat May 14, 2011 11:50 pm
Forum: EECGeeks
Topic: Stack pointer shenanigans
Replies: 4
Views: 3315

Re: Stack pointer shenanigans

Hi all, I've just joined the list - I spent a lot of time over the years on trying to understand the various binaries..... the A9L writes to the stack pointer in several places, for interrupt handling, and also for self test mode(s). whenever this is done, the code has several 'nop' ops after it. It...