[tvrfan]

I just spotted this in DOAV654 bin....

Code: Select all

031d8: 3c,7b,1e           jb    B4,R7b,031f9     if (B4_R7b = 1) goto 031f9;
031db: b3,01,56,03,90     ldb   R90,[R0+356]     R90 = R356;
031e0: 3b,90,16           jb    B3,R90,031f9     if (B3_R90 = 1) goto 031f9;
031e3: fd                 regbk 3                
031e4: 91,08,56           orb   R356,8           B3_R356 = 1;
031e7: f4                 regbk 0                
031e8: fd                 regbk 3                
031e9: 91,04,56           orb   R356,4           B2_R356 = 1;
031ec: f4                 regbk 0                
031ed: fd                 regbk 3                
031ee: 71,df,56           an2b  R356,df          B5_R356 = 0;
031f1: f4                 regbk 0                
031f2: 20,05              sjmp  031f9            goto 031f9; }

031f4: fd                 regbk 3                
031f5: 91,20,56           orb   R356,20          B5_R356 = 1;
031f8: f4                 regbk 0                 } }
031f9: 9b,01,76,02,00     cmpb  R0,[R0+276]     

Just for everyone's info. I think this pretty much proves that this code was compiled, as a typical compiler does a "for each opcode" kind of analysis, so switching register (ram) bank for each opcode and returning to zero (obviously defined as 'home' for the compiler), whereas a human programmer would do this kind of thing instead -

Code: Select all

031e3: fd                 regbk 3                
031e4: 91,08,56           orb   R356,8           B3_R356 = 1;     
031e7: 91,04,56           orb   R356,4           B2_R356 = 1;
031ea: 71,df,56           an2b  R356,df          B5_R356 = 0;
031ed: f4                 regbk 0                

I have seen this kind of ram bank sequence in other bins too, so it's not unusual, so don't worry that there's any special reason for it.

Note that also at 031db, the opcode is an indexed address mode which goes to an internal register, which was a previous question (somewhere in EEC Geeks) about how the address map works....this shows it's legal to use indexed mode into internal register/ram bank of CPU.

Compilers in use today often have a separate check/pass, after the compile run, to remove redundant operations to make the code faster....looks like the Ford EEC one did not....

[ollopa]

It could also be a macro from a macro assembler. Imagine some poor soul kept mismanaging the bank switches and decided to just make a macro that guaranteed a return to a known context.

The best signature of a compiler would probably be an (inefficient) convention for parameter passing either by use of the stack or reserved registers.

[tvrfan]

Yep, agree totally, could be a macro type construct too.

and the old programming rule -- "make it work first before you make it work fast" is always wise...

[cgrey8]

...and the old programming rule -- "make it work first before you make it work fast"...

That philosophy is still alive-n-well where I work.