PYM, TVRFan and I aware that the disassemblers are not handling SFR+100 and R+100 memory offsets in all cases.
I have written test bins to dis/prove conjecture around the SF/R+100 memory offset.
The files can be found at;
https://github.com/OpenEEC-Project/EEC- ... -Test-Bins
They are well worth a look.
We'd be interested in your results if you decide to run them on your own hardware.
Moderators: cgrey8, EDS50, Jon 94GT, 2Shaker
SFR+100 and R+100 8065 memory access
Cheers
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
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