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Re: SAD disassembler progress

Post by jsa » Sun Dec 29, 2019 11:35 pm

DIR

Code: Select all

rbase f6 cf34
rbase fe db54

SYM CF49 "S.some_name_1n/a"
SYM DB56 "S.My_Name_15no."

unnnamed in lst

Code: Select all

5a6f: 9b,fe,02,42         cmpb  R42,[Rfe+2]      
5a73: d3,04               jnc   5a79             if (R42 >= [db56])  {

5a9d: b3,f6,15,30         ldb   R30,[Rf6+15]     R30 = [cf49];
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Re: SAD disassembler progress

Post by tvrfan » Mon Dec 30, 2019 4:31 am

Symbols all f**ked up, after making a change for a multibank error. Found it. Another stupid mistake.
so ifs, and some bit names don't work.

Will change the ands and ors to byte too, I'll see if I can get ldb and ldw to work with flags too...
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 6:34 am

No worries, onto the next release.
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Re: SAD 4.0.3c released

Post by tvrfan » Mon Dec 30, 2019 1:33 pm

Hopefully, this will finally fix up symbols and rbases with ranges (and bit syms).
Error was in the command handling where cmd has a single start address combined with a range (i.e. start-end address pair).

Also changed Bx_Rn to byte, as per request.

It's still a debate about the ldx ops - in some bins, the flag words/bytes are used as temp variable for intialise, sometimes general regs (e,g, R30)
are used to hold a flag word/byte, so haven't sorted those automatically.

However, if you declare a bit symbol , SAD should use the Bx_Rn style everywhere in range defined for that word/byte.
Not sure whether this is the right way to go or not....seems right.
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 3:27 pm

I think load and store for that matter are primarily byte and word manipulators. Therefore not suitable for auto bit output.

So range is the best solution that comes to mind right now.

With regard to loading the startup list, maybe Bit instructions to struct are suitable. Certainly if the struct destination address is defined as flags then bit output is correct.

I have some reservations with bits for word size OR, AND & XOR. Have to see more examples before reaching any conclusion.
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 4:37 pm

getting closer

4.03c dir

Code: Select all

SYM   2 "LSO_Port"
SYM    2 "CPU_OK"            :T 6       # V0.5 +6
SYM    3 "LIO_Port" 
lst

Code: Select all

4562: 61,05,e0,02         an2w  R2,e005          B1_R2 = 0;
                                                 B3_R2 = 0;
                                                 B4_R2 = 0;
                                                 B5_R2 = 0;
                                                 CPU_OK= 0;
                                                 B7_R2 = 0;
                                                 B0_R3 = 0;
                                                 B1_R3 = 0;
                                                 B2_R3 = 0;
                                                 B3_R3 = 0;
                                                 B4_R3 = 0;
                                                 
preferred similar to 3.08

Code: Select all

4562: 61,05,e0,02         an2w  R2,e005          B1_LSO_Port = 0;
                                                 B3_LSO_Port = 0;
                                                 B4_LSO_Port = 0;
                                                 B5_LSO_Port = 0;
                                                 CPU_OK= 0;
                                                 B7_LSO_Port = 0;
                                                 B0_LIO_Port = 0;
                                                 B1_LIO_Port = 0;
                                                 B2_LIO_Port = 0;
                                                 B3_LIO_Port = 0;
                                                 B4_LIO_Port = 0;
                                                 
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 5:26 pm

4.03c
dir

Code: Select all

Sub 6C15 "Sub6C15_NAME"
lst not named

Code: Select all

   Sub_6c15:
6c15:
more 1st commandment
dir

Code: Select all

Sub 75AB "Sub75AB"
Sub 75C4 "Sub75C4"   
lst

Code: Select all

   Sub_75ab:
75ab:

   Sub_75c4:
75c4:

###############################################################
# Called by Sub_75ab at L75F3
# Called by Sub_75c4 at L75F3
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Re: SAD disassembler progress

Post by tvrfan » Mon Dec 30, 2019 5:37 pm

OK, well I agree that's a lot better -

I have broken the "Bx_wholename" with my bit change. OK.
Ah. I think I know why already on this one....... I have changed the Bx_Rn for split byte....

looks like somewhere SAD still overrides a user defined sym - OK.
need to look for this one.

two to look at then. Thanks.
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 6:03 pm

Yes, getting very close on naming.

I see a nice improvement where some back tracking is done to identify a/ bit name/s, but not all examples are found. In one case at least forward tracking a couple lines would find the information.

The last naming issue I have for 4.03c.
dir

Code: Select all

SYM D882 "S.name1"
SYM D883 "S.name2"
SYM D884 "S.name3"
SYM D885 "S.name4"
SYM D886 "S.name5."
lst

Code: Select all

   S.name1:
d882: ff,ff,ff,ff,04,ff   ???   
Logically, all the bit output looks ok so far in general.

I note the use of SUB in names gets decapped to Sub in lst.
A subtle name convention I use has SUB for those that SAD failed to find at some point in version history.
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Re: SAD disassembler progress

Post by tvrfan » Mon Dec 30, 2019 7:29 pm

thanks John. Noted for checking...

BUT ....

A question prompted by the bits change in style --> B8_R34 to B0_R35.

I'm looking at my bits change, and I have forgotten to recheck the symbol names properly, which is why it isn't showing up correctly (per jsa post)

But this makes me ask the question.... If you define a name at R34 and not for R35 e.g.

SYM MyFlags 34
SYM flagname 34 :T 7

ORB R34, 80; flagname = 1;
ORB R34, 40; B6_MyFlags = 1;

what should bit 8 show up as ??

ORW R34, 100; B8_Myflags = 1; - - - or - - - ORW R34, 100; is B0_R35 = 1; Which is better for understanding ??

- if the sym commands are

SYM MyName 34
SYM flagname 34 :T 7
SYM Xflags 35

does ORW R34, 100; become B0_Xflags = 1; ???

Now your first reaction may be "well of course" but then there's no obvious link between Xflags and Myflags,
and there are typically lots of shuffles and maths in other bits of code where this might actually get MORE confusing - say for example

ML2B R34, R36; Myflags *= R36;
LDX R38, R35; R38 = Xflags; <- what should go here? ------- because really the calculation is R38 = (Myflags * R36) /256;

So this leads to another dependent question, and a return to an old topic - Should SYMs have a size (Word, Byte, Long), [Byte would be default] ???

if so, how should a WORD symbol (say, e.g. SYM R34 Myname : W) be represented for the opcode
Ldb R38, R35; ? R38 = Myname_H -- or -- R38 = Myname/256 ??

and LDB R35, R38; Myname_H = R38 ? -- or -- Myname |= (R38 *256); ?? (no, |= is not quite right, but for the principle of asking)

What makes the most sense ???

My opinion ?? I don't really have a stake here, after 30 years in IT, it's totally obvious to me that R35 is R34/256 and SHR R34,3 is R34/8 and why there has to be an asrw (arithmetic right shift) but not an arithmetic left shift and so on, to the point I'm not even aware I'm doing it.

SAD was supposed to be for non-techies, so --- Opinions Anyone ? What makes sense to you ?
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Re: SAD disassembler progress

Post by jsa » Mon Dec 30, 2019 10:36 pm

Thanks Andy
Thanks Andy
can-of-worms.png (438.54 KiB) Viewed 5270 times

Edit: :twisted: I just noticed this is my 666th post, LOL. :twisted:
Last edited by jsa on Tue Dec 31, 2019 1:18 am, edited 1 time in total.
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Re: SAD disassembler progress

Post by jsa » Tue Dec 31, 2019 12:56 am

tvrfan wrote: Mon Dec 30, 2019 7:29 pm BUT ...
The unintended consequences
Known Unknowns and Unknown Unknowns

Beware of confusing the issue between bit operations and other general operations.

A question prompted by the bits change in style --> B8_R34 to B0_R35.
SAD has always functioned with SYM working on bytes and therefore 0 to 7 bits.
B8 is a new concept as of V4 as far as everyone's existing DIR's are concerned.
Sticking my neck out, not testing it, B8_R34 wouldn't work in any previous version (or is there a trojan horse).

I asked for B0_R35 as it would be defined in existing DIR's whereas B8_R34 would not, at least in DIR's I have seen.

But this makes me ask the question.... If you define a name at R34 and not for R35 e.g.

SYM MyFlags 34
SYM flagname 34 :T 7

ORB R34, 80; flagname = 1;
ORB R34, 40; B6_MyFlags = 1;

what should bit 8 show up as ??
Well it is orB not orW, so no bit8 possible.
No B8_anything in any DIR I've seen to date, nor is it likely considering SYM has only ever worked on Bytes.

In my DIR at least, I have lots of high byte registers defined as bytes and bits. Some because of address modes, others for bit flags.

Ok Ok rip the lid off another tin.
Should the handbook convention be followed, B is byte, W is word, b is to vague for bit in LST, F for flag or T???

ORW R34, 100; B8_Myflags = 1; - - - or - - - ORW R34, 100; is B0_R35 = 1; Which is better for understanding ??


- if the sym commands are

SYM MyName 34
SYM flagname 34 :T 7
SYM Xflags 35

does ORW R34, 100; become B0_Xflags = 1; ???

Now your first reaction may be "well of course"
Yes, yes, yes. Somewhere else R35 will likely be operated on with ORB or AN2B.
Existing complete DIR will have a SYM for R35 but not for B8_R34.

but then there's no obvious link between Xflags and Myflags,
Was there ever an explicit link considering SYM has always been byte centric???
That said I have some like;
SYM Name 34
SYM Name^ 35

So naming fulfills the link with ^ signifying the high byte of a word. This also covers addressing modes.

and there are typically lots of shuffles and maths in other bits of code where this might actually get MORE confusing - say for example

ML2B R34, R36; Myflags *= R36;
LDX R38, R35; R38 = Xflags; <- what should go here? ------- because really the calculation is R38 = (Myflags * R36) /256;
Hmmm they are typically scratch register, but is that the context of the question?
Yes there are lots of code situations where one has to be awake to the total length of multiply etc.
R35 having been defined in DIR as Xflags for the address range or globally, then Xflags it must be..........the 1st commandment.
Being a scratch it may not be flags for the local address range, so user will need to apply appropriate range.

So this leads to another dependent question, and a return to an old topic - Should SYMs have a size (Word, Byte, Long), [Byte would be default] ???
Yum, can number 3. It's not that simple.

Byte - 8 bits
Word - 16 bits
???? - 24 bits
Long - 32 bits

Yes Ford has 24bit length objects in RAM.
You would think they are in endian order, but no that is just to easy.
You would think they would be 3 contiguous bytes, but no still to easy.
You would think they would all be layed out the same, absolutely to easy.

I have;
Name
Name^
Name^^

Of course SYM could have T, Y, W, Wandahalf, L, without causing any grief for existing DIR as it works as T and Y now.
It is one step closer to being able to generate a csv or xdf for definition files, so it has some obvious purpose.
So, by all means go for it, try not to break existing along the way.

if so, how should a WORD symbol (say, e.g. SYM R34 Myname : W) be represented for the opcode
Ldb R38, R35; ? R38 = Myname_H -- or -- R38 = Myname/256 ??
Inevitably the user wants both;
SYM R34 Myname : W
SYM R35 Aname : Y

LDB is a byte operation so should it display the byte name Aname???

If both are ranged then it depends on the address range.
If neither have an address range then it should follow existing DIR. R38=Aname even if the : Y is missing.

If only SYM R34 exists then R38 = Myname/256 is most informative for that use case. It highlights to the uninitiated what has actually occurred, but so does a comment.

and LDB R35, R38; Myname_H = R38 ? -- or -- Myname |= (R38 *256); ?? (no, |= is not quite right, but for the principle of asking)
Yeah, falls on its face right there. LDB is a byte operation.
The fact that R38 is the result of something to be saved to R35, means R35 is not the rescaled high byte of some word operation.

What makes the most sense ???
ordb, an2b & xorb bit flag operations are not the same as general operations.
B8_R34 is misleading to me. B0_R35 is what I expect to see or its bit name or B0_ByteName.
SYM byte is already the default.
SYM bit is already defined.

A defined SYM 35 "bitname" :T 0 takes precedence SYM 35 "bytename".
B0_bytename in the abscense of a bitname.
bytename if it is not a bit operation.

My approach of samename/^/^ makes sense to me in the context of the bins I have looked at, so I have a bias.
Yes, I can see the purpose of defining sym size, but I expect lots of use cases that will be very messy.

My opinion ?? I don't really have a stake here, after 30 years in IT, it's totally obvious to me that R35 is R34/256 and SHR R34,3 is R34/8 and why there has to be an asrw (arithmetic right shift) but not an arithmetic left shift and so on, to the point I'm not even aware I'm doing it.
Yes, it is something the aspiring disassembler must understand. The auto comments help of course.
I have some early remaining manual comments to remind myself of such things.

SAD was supposed to be for non-techies, so --- Opinions Anyone ? What makes sense to you ?
Yes, anyone else?
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Re: SAD disassembler progress

Post by jsa » Tue Dec 31, 2019 12:59 am

For the next update I think;
* finish getting the names back to 3.08 quality
* tidy up any structure issues
* add in some command option for args that have multiple offsets applied.
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Re: SAD disassembler progress

Post by tvrfan » Tue Dec 31, 2019 4:02 am

Thanks for that ---- I'll save it and read several times over and have a think about it.

Trouble is it all gets very complicated. I did wonder about keeping a calculation 'memory' for some groups of opcodes.

Incidentally, only DIV and MLT have 32 bit (LONG) operations, shifts can be regarded as subsets of DIV and MLT so they have longs too.

the 24 bit (e.g. time is often 24 bit) is always maintained with multiple opcodes (as far as I have seen) so it's software, not hardware.
a 24 bit sym ??? perhaps.........


For confirmation, in case of any confusion.

SAD isn't actually byte only for symbols, it simply has an address and a name stored (+bits +address range if relevant) .
So R34 Word op matches sym 34, R34 Byte op also matches 34. R35 doesn't match any name unless a sym for 35 is declared.
Before your requested change, an ORW , AN2W would indeed produce B10_R34 = 0 in the bit style. (3.08 DOES do this)

I only changed bit syms with a 'split' byte, as there are several bins which do have an ORW in one spot and an ORB in another for the same bit flag in an upper byte (= odd address), so a named bit symbol would not work reliably when defined as a sym 34 <name> :T 10.

NB. I can't reproduce your sub naming problem. I've tried several combinations in the dir file (even declaring vects first). Any clues about order of commands or something ?


Hey, are U near any of the fires ???
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Re: SAD disassembler progress

Post by jsa » Tue Dec 31, 2019 8:56 am

24bit, yes other than * and / hardware can do 16bit directly. Agree the 24bit are software managed, but none the less stored as 24bit values.

24bit sym, for derivatives of time, have a look at;
Sub654F
Sub8916
Sub7469
SubA25D

3.08, ok, I have razor rash, but keep my head as sym 34 <name> :T 10 is unreliable.

Sub naming- DIR order is;
Rbase
SYM for register and RAM in increasing order
SYM for bytes, words and scalars from 2000 up
func then SYM. each pair in turn from C000 up
table from C000 up
arg, byte, code, struct, timer vect, word from 2000 up
sub from 2000 upin increasing order

Probably not text book, but arrived at by trial and error with earlier versions of SAD. I will do some more work to try and isolate cause.

I am on the south side of Brisbane, thankfully not threatened by bush fires so far. Have had some very hazy days from fires 100's of k's away.

3 cheers for 2020, have a great new year.
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Re: SAD disassembler progress

Post by tvrfan » Tue Dec 31, 2019 2:29 pm

OK. good.

I've come up with these rules for bit flags (applied in order) -

1. If a sym is defined for the relevant bit, either as even address and bit > 7, or as odd address and bit < 8, that name will always appear.
(which implies convert to byte where required)

2. if a sym is defined for the byte (odd or even address), then that is used accordingly.
3. If a sym is defined for an even address, no bit defined and there is no symbol for the higher byte, then print of bit is not converted.
4. if no syms defined, then uses R<addr> B<bit> and converts to byte.

I think that makes most sense.

example ......

opcode ORW R34, 200;

if sym 35 "bitname" : T 1 defined then prints bitname = 1;
if sym 34 "bitname" : T 9 defined then prints bitname = 1; (exactly the same)

if sym 35 "hname" and no bit name defined then prints B1_hname = 1;
if sym 34 "gname" and no bit name and 35 not defined then prints B9_gname = 1;

If no syms at all then prints B1_R35 = 1;

So that tries to get whatever symbol name it can.....................

I'm also trying to get LDB and LDW to work the same if symbols are defined by address range for that opcode - not quite right yet, bug somewhere.

AHA - there's something weird going on in the command inserts into command chain, found whilst testing the above, would probably explain the subrs too.........
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Re: SAD disassembler progress

Post by jsa » Tue Dec 31, 2019 4:46 pm

Understood.
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SAD 4.0.3.d

Post by tvrfan » Fri Jan 03, 2020 10:48 pm

OK, I hope that's fixed the symbols.

I couldn't actually reproduce the issue with user defined names being replaced with SAD 'auto' ones, but I did find an error with finding
symbols with ranges defined, which may have caused a range of problems.

Tidied up and fixed symbol names for 'if' statements, and added an :F option (= 'flags') for symbols, if you add an F option to the name, it will decode LDx into separate bits where opcode is an immediate value - this is an experiment.

Ranges should now apply consistently for all symbol names, read,write, and bit definitions.

But I'm not convinced I've found everything - I can't see anything in the code [any more], but ......

I await feedback !!
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Re: SAD disassembler progress

Post by jsa » Sat Jan 04, 2020 8:09 am

Thanks.

I am fighting an update to my sons pc. Will add this to my list.
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Re: SAD disassembler progress

Post by tvrfan » Sat Jan 04, 2020 3:01 pm

Good luck !

I gave up fighting with Windows a long while ago, and went Linux instead, and am trying to convince as many people as possible to do the same.

(Yeah, I know, but I can't help pushing at least a little bit ! )

I have XP and 7 only in virtual machines (VirtualBox), used mostly for SAD builds.

Oh, by the way, I forgot to say how much I liked that 'can of worms' picture. Perhaps I should make that my SAD icon.....
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SAD 4.0.4 released

Post by tvrfan » Tue Jan 14, 2020 11:51 pm

As per release notes -

1. Changed vector list (=pointer list) validation YET AGAIN after discovering another couple of bins which don't work.
added a simpler, but new rule to validate whether list is real.

2. Added extra scan pass to check for 'code holes' which may have been missed. Example is where
binary does a 'remote' push. E.g. A9L, which has R34=79f9; and push(R34); somewhere else not obviously connected.
(also for CARD, at 4510, but many other examples).

3. Added extra check where an indexed data reference actually points to a code location, but the register value
cannot be calculated. If the base pointer is within 16 bytes of a 'hole' in the code, then data pointer is moved
to the 'hole'. (this is experimental)

Example in A9L where a data reference has [R56+2a2e] but code covers 2a15 to 2a31. R56 is 4,6, or 8 (number of cylinders)
so data ref is moved automatically to 2a32 (i.e. +4).

4. Added extra checks for data overlapping code and faulty references.
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Re: SAD disassembler progress

Post by jsa » Sat Jan 18, 2020 8:00 pm

tvrfan wrote: Sat Jan 04, 2020 3:01 pm Good luck !

I gave up fighting with Windows a long while ago, and went Linux instead, and am trying to convince as many people as possible to do the same.

(Yeah, I know, but I can't help pushing at least a little bit ! )

I have XP and 7 only in virtual machines (VirtualBox), used mostly for SAD builds.

Oh, by the way, I forgot to say how much I liked that 'can of worms' picture. Perhaps I should make that my SAD icon.....
Correct, luck, phase of the moon, quantum entanglement...... Can you imagine the mess we'll be in with Windows Q.. :twisted:

Anyway the struggle, trying to get MS ADK to build a ~SP2 install disk. Having given up on MS tools I have NTLite chewing through driver integration, so I have a chance to look at SAD while I wait.

I am all for avoiding windows 10 but I have numerous software packages that are Windows. Maybe with time they could be coaxed to run in a VM, but that is still windows in a box.

Can of Worms, yes very fitting. You just don't know what you're getting into when you start.
Cheers

John

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Re: SAD disassembler progress

Post by jsa » Sat Jan 18, 2020 8:17 pm

Thank you for 4.04's.

CARD cold start for both, check out L3BE3. an2w VS an2b

by SAD Version 4.0.3c (31/12/2019)

Code: Select all

3be3: 71,87,34            an2b  R34,87           B3_R34 = 0;
                                                 B4_R34 = 0;
                                                 B5_R34 = 0;
                                                 B6_R34 = 0;
by SAD Version 4.0.4 (15/01/2020)

Code: Select all

3bb3: 61,3f,fe,34         an2w  R34,fe3f         B6_R34 = 0;
                                                 B7_R34 = 0;
                                                 B0_R35 = 0;
3bb7: c7,74,9c,34         stb   R34,[R74+9c]     [R74-64] = R34;
3bbb: c7,74,9d,35         stb   R35,[R74+9d]     [R74-63] = R35;
3bbf: b3,74,9e,40         ldb   R40,[R74+9e]     R40 = [R74-62];
3bc3: 71,7f,40            an2b  R40,7f           B7_R40 = 0;
3bc6: c7,74,9e,40         stb   R40,[R74+9e]     [R74-62] = R40;
3bca: b3,74,9e,38         ldb   R38,[R74+9e]     R38 = [R74-62];
3bce: 91,02,38            orb   R38,2            B1_R38 = 1;
3bd1: c7,74,9e,38         stb   R38,[R74+9e]     [R74-62] = R38;
3bd5: c7,74,d4,00         stb   R0,[R74+d4]      [R74-2c] = 0; }
3bd9: b3,74,9e,34         ldb   R34,[R74+9e]     R34 = [R74-62];
3bdd: 51,78,34,3e         an3b  R3e,R34,78       R3e = R34 & 78;
3be1: df,16               je    3bf9             if (R3e != 0)  {
3be3: 71,87,34            an2b  R34,87           R34 &= 87;
.
3ff5: 71,f0,3a            an2b  R3a,f0           R3a &= f0;
Cheers

John

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Re: SAD 4.0.4

Post by tvrfan » Sat Jan 18, 2020 9:11 pm

Linux -

Software packages ? Like what ? (I'm interested) As far as I am aware there's actually not that much left which doesn't have a linux equivalent (and the linux one will typically read the original Win files too, e.g. LibreOffice ). But then stuff like MS virtual C won't just swop over....
I've been playing with FLTK for a platform independent simple graphics library for example (it's C++), as having Win32 and X win versions doesn't appeal.

Only difference in SAD code is the file opening modes and the path character, done by #define, as it's still a console app with no graphics.

Yeah, I used NTLite a while ago, it was very good for XP, but not used it since going linux.


Your Code Snippet.

What are you saying - that it's inconsistent ?? I see that it's *technically* right, but I can see the inconsistent printouts too.
I still haven't truly figured out a rule for when to use the Bx_Rn /Bx_name format. This is also why I added that :F (flags) for symbols.

Any suggestions (yes, I agree probably a continuation of previous posts, but still).

For me the only remaining step for SAD now is to try to get some data analysis to sort out the unknown data structure formats, and then it's bug fixes (& requests) only.

I sometimes fancy doing an 806x emulator, but then sometimes not.......
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Re: SAD disassembler progress

Post by jsa » Sat Jan 18, 2020 9:49 pm

Cold start code scanning is doing a good Job. Code missed from 5DE7 to 5EF5. Vectors in structure from 5EF6.
70BE is not code.

4,6,8 has some misses with word sized sets.
65E0 2 sets of 3 in a row.
70BE 3 Words not code.
8C62 2 sets of 3 in a row, not 8C61.

So it looks pretty good for a cold start without DIR or CMT.
Cheers

John

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Re: SAD 4.0.4

Post by jsa » Sat Jan 18, 2020 10:25 pm

tvrfan wrote: Sat Jan 18, 2020 9:11 pm Linux -

Software packages ? Like what ? (I'm interested)
Autocad and Solidworks are two that present a challenge, as a _lot_ of cash goes into acquiring those and a lot of time to customize to purpose.

Applications that talk to industrial hardware like VSD's, BACnet, MODBUS, etc. A lot of those are manufacturer tools which don't have windows alternates let alone Linux. You could chuck BE in as well I suppose along with other tuning software. Pre cloud Lightroom and other Adope stuff, alternates do exist for those I expect, but how good are they.

As far as I am aware there's actually not that much left which doesn't have a linux equivalent (and the linux one will typically read the original Win files too, e.g. LibreOffice ).

Yeah, there are a couple office options. Would need to try them and see how they handle various excel macro's.

But then stuff like MS virtual C won't just swop over....
I've been playing with FLTK for a platform independent simple graphics library for example (it's C++), as having Win32 and X win versions doesn't appeal.
Yeah, an option for GUI.

I see Vulkan is mooted as an alternate to DirextX which would overcome the gaming limitation for Linux on my sons machine.
Yeah, I used NTLite a while ago, it was very good for XP, but not used it since going linux.
Yeah, nlit'd XP to death myself.
nTlite, is for 7 on up.
MS DISM worked for me last time I did a build, but MS broke it somehow with god knows which patch when.
Another 2 weeks of spare time down the toilet, thanks MS.

Your Code Snippet.

What are you saying - that it's inconsistent ?? I see that it's *technically* right, but I can see the inconsistent printouts too.
I still haven't truly figured out a rule for when to use the Bx_Rn /Bx_name format. This is also why I added that :F (flags) for symbols.
Technically spot on, so I put it up to have a look at and consider. Inconsistent - yes.
A bit like QA, should be call CA, consistency assurance - good or bad.

Yep, :F in a DIR, but this was a cold start curiosity.

Any suggestions (yes, I agree probably a continuation of previous posts, but still).
Yes, made my views known a few posts up.

For me the only remaining step for SAD now is to try to get some data analysis to sort out the unknown data structure formats, and then it's bug fixes (& requests) only.

I sometimes fancy doing an 806x emulator, but then sometimes not.......
Spitting out CSV's to build a def from would be handy.

Hmmm, starting again. Would you have started the 1st time, knowing what you know now!
Cheers

John

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Re: SAD 4.0.4

Post by tvrfan » Mon Jan 20, 2020 2:09 pm

Ah, right. I was thinking more of home or office type desktop - not industrial control type stuff.
A quick scan of your acronyms shows there are some alternatives, but yeah, how good they are remains the question.

So you will be stuck with either a VM (VirtualBox is very good though) or something like Wine (effectively Win32 libraries on Linux)
which can be painful as I understand. Never used Wine.

I use VM's now, and did in work too, we used to have VMware ESX so we could run both MS and Linux on the same servers. That worked very well, although didn't get to see much of the base VMware layer itself.

I don't know about Excel Macros, I don't think they are directly compatible. The cell formulas (even complex ones with If-Then etc.) seem to be handled correctly.

Gaming - of course that hasn't got fully OS independent either - although a lot of the older stuff now has freeware 'engines' which run the game code
in linux, but not the newer games.

So I was a bit optimistic there !! One day.....

SAD

Don't know what to do about flag bits - I'll reread your earlier posts and consider.....current rule isn't good enough.

CSV ? have you got a CARD or A9L example (or http link)? I could consider that if it helps.

Emulator - I have an old one I wrote to play with, but console only. The core bits of SAD which do opcodes would move easily - need to play a lot more with FLTK (etc) to learn more graphical stuff. All of my IT career was backend server, with a text console.
I'm happy with with those old unix command line tools, vi, awk, perl, sed, etc. (yep, dinosaur!) but can still write advanced regexps
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Re: SAD 4.0.4

Post by jsa » Fri Jan 31, 2020 1:54 am

tvrfan wrote: Mon Jan 20, 2020 2:09 pm Don't know what to do about flag bits - I'll reread your earlier posts and consider.....current rule isn't good enough.

2 further thoughts here;
1. ORB and AN2B in immediate address mode. Are they always used as bit manipulators?
2. Should SAD track where registers are operated on as flags in multiple places and treat accordingly throughout?
CSV ? have you got a CARD or A9L example (or http link)? I could consider that if it helps.
Here is the tables tab for GUFB in the BE definition maintained by CGrey;
BE Tables TAB
BE Tables TAB
Tables Tab.png (145.83 KiB) Viewed 4634 times
If you save that tab as CSV you get;
GUFB_Tables.csv
exported comma separated values file
(33.56 KiB) Downloaded 56 times

On Windows, double clicking on that CSV file will reopen it in excel. Basically a round trip.

So if SAD generated a file in that format from DIR etc, that csv file could be used along with others for each def tab to reduce some of the donkey work of transposing from SAD to BE definition. Similar could be done for TP XDF which is really XML.

The first row of the header needs to be column labels as per BE's help file.
Looking at the data rows;
Level and Level2 don't have a match in SAD so a comma gives a null entry.
PID and Key can come from the SYM name.
Title, description and/or comments could come from a user comment placed after the SYM command in the dir. Some more thought required on that I think.
Address from SYM in DIR
Further columns require SAD to track more stuff.
Where commas are found in SAD dir that block of info would need to be in quotes in the CSV. See some of the comments or FN1325 row and XLabels column.

Scalar, function and tables definition tabs are all ROM addresses.
Payload definition tab is all RAM addresses.

Of course SAD reading a set of definition tab csv's could generate a DIR, if you were inclined.
Emulator - I have an old one I wrote to play with, but console only. The core bits of SAD which do opcodes would move easily - need to play a lot more with FLTK (etc) to learn more graphical stuff. All of my IT career was backend server, with a text console.
I'm happy with with those old unix command line tools, vi, awk, perl, sed, etc. (yep, dinosaur!) but can still write advanced regexps
I know very little about cross platform GUI, other than now and then, I use an some app with a nice one.
Cheers

John

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Re: SAD disassembler progress

Post by jsa » Sat Feb 01, 2020 9:39 pm

Multitasking between Bathurst 12hr and SAD.

CARD 4.04 DIR

Code: Select all

SYM   D5 "Flag_0"         :T +0
SYM   D5 "Flag=1_No"      :T +1
SYM   D5 "Flag_B2"        :T +2
SYM   D5 "Flag_B3"        :T +3
SYM   D5 "Code_b_4"       :T +4
SYM   D5 "Code_b_5"       :T +5
# SYM   D5 "Code_B6"        :T +6
SYM   D5 "Flag_B6"        :T +6
# SYM   D5 "Code_B7"        :T +7
SYM   D5 "Flag_B7"        :T +7
LST

Code: Select all

4b43: 55,f0               #args
4b45: 91,f0,d5            orb   Rd5,f0           Rd5 |= f0;
Flags not displayed in LST.
Follows args which may/not be relevant.
Cheers

John

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Re: SAD disassembler progress

Post by jsa » Sat Feb 01, 2020 10:16 pm

DIR

Code: Select all

SYM  4A  "HSO_Hdlr_Flgs"
SYM   4A "HSO_B0_R4A"        :T +0     # 
SYM   4A "HSO_Byps_time"     :T +1     # 
SYM   4A "HSO_Byps_limit"    :T +2     # 
SYM   4A "HSO_Immediate"     :T +3     # 
SYM   4A "HSO_No_service"    :T +4     # 
SYM   4A "HSO_Late_output"   :T +5     # 
SYM   4A "HSO_Queued"        :T +6     # 
SYM   4A "HSO_No_queue"      :T +7     # 

LST 4.04

Code: Select all

55b6: 71,20,4a            an2b  R4a,20           HSO_Hdlr_Flgs &= 20;

LST 3.08

Code: Select all

55b6: 71,20,4a            an2b  R4a,20           HSO_B0_R4A = 0;
                                                 HSO_Byps_time = 0;
                                                 HSO_Byps_limit = 0;
                                                 HSO_Immediate = 0;
                                                 HSO_No_service = 0;
                                                 HSO_Queued = 0;
                                                 HSO_No_queue = 0;
Cheers

John

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