Does it apply to the 8061?8096 development board document wrote:WORD
A WORD is a 16-bit variable. The address of a WORD is the address of its least significant byte. A WORD must start at an even byte address.
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word address requirements ?
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John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
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John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
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decipha
Re: word address requirements ?
theres some missing info
all LOOKUP words SHOULD be on an evenly aligned address boundary i.e. an even address divisible by 4 for the ecu to quickly reference the value, referencing a word as an odd address in the lower 0x400 registers will give you an unexpected result
that doesnt apply to the later eec-v's where the calibration constants/scalars are actually in the code which falls on odd addressing quite frequently
all LOOKUP words SHOULD be on an evenly aligned address boundary i.e. an even address divisible by 4 for the ecu to quickly reference the value, referencing a word as an odd address in the lower 0x400 registers will give you an unexpected result
that doesnt apply to the later eec-v's where the calibration constants/scalars are actually in the code which falls on odd addressing quite frequently
Re: word address requirements ?
Yes, the 8061 and 8065 have the same requirement as the 8096 for word sized data to be stored in memory at an even address.
Re: word address requirements ?
Thanks gents.
Cheers
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
Re: word address requirements ?
I don't know if there was a different processor for Ford ECUs before EEC-IV, but you will see code in 8061 that loads words a byte at a time. So this word on an address divisible by 2 business may not always have been the case.
Re: word address requirements ?
04H & 05H for 8061.8096 section of the 1985 Intel Microcontroller Handbook wrote: 2.9.3. A/D Results
Results of the analog conversions are read from the A/D
Result Register at locations 02H and 03H. Although these
addresses are on a word boundary, they must be read as
individual bytes.
Would, byte at a time read of words be needed once R4&R5 are read and stored as a word somewhere else ?
A case in point ?mpaton wrote:you will see code in 8061 that loads words a byte at a time
Code: Select all
cc,38 pop R38 R38 = pop();
b2,3b,3c ldb R3c,[R38++] R3c = [R38++];
b2,3b,3d ldb R3d,[R38++] R3d = [R38++];
c8,38 push R38 push(R38);
Last edited by jsa on Sat Oct 24, 2015 3:06 pm, edited 2 times in total.
Cheers
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
John
95 Escort RS Cosworth - CARD QUIK COSY ANTI / GHAJ0
Moates QH & BE
ForDiag
Re: word address requirements ?
The 8061 A/D result register is at address 0x04 and 0x05.
Re: word address requirements ?
As I said in other thread, the reason for this is as follows.jsa wrote:A case in point ?mpaton wrote:you will see code in 8061 that loads words a byte at a timeCode: Select all
cc,38 pop R38 R38 = pop(); b2,3b,3c ldb R3c,[R38++] R3c = [R38++]; b2,3b,3d ldb R3d,[R38++] R3d = [R38++]; c8,38 push R38 push(R38);
In code, there is no guarantee that an inline word param will be on an even byte, as opcode length varies, especially for the multiple address modes, so in order to be safe, the code must load a byte at a time. In the example above, it is then safe to use R3c as a word value. (note the POPped value is of course an ADDRESS, and could be odd)
You will see that where there is fixed calibration data, there is quite often a single 0xff filler after one or more byte values, to get an even address for following word value(s).
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