[jsa]

My immediate thought is no change to R47, why bother, but is it?

Code: Select all

5730: 91,00,47            orb   R47,0            R47 |= 0; 

EDIT:
Likewise xrw 0

Code: Select all

5736: 85,00,00,58         xrw   R58,0            R58 ^= 0;

[tvrfan]

First one doesn't change R47, but does set the PSW for a subsequent conditional jump....
You may also see R30 += 0 and similar, which do the same thing.
It's not stated anywhere (that I've found), but I guess it's perhaps quicker to execute than a cmp, which effectively does a subtract, and bitwise ops
are typically faster that arithmetic ones.

xrw R58, 0 flips every bit in the word (= reverse mask);

[jsa]

Thanks TVRfan.

I will have to have another look at R47 with flags in mind. Yes I have seen other flag setting code similar to this and your R30 example. I discounted flags because of another op before the conditional.

I have the android realcalc app which has logical functions. Xor 0 had no effect on some test numbers. Time to do some reverse mask reading.

[sailorbob]

XORing with a zero doesn't change any bits in the destination register. It's probably done to waste some state times for some reason.

[tvrfan]

Oops - a brain fart there..... I was thinking of the bitswap trick which actually uses 3 xors.... apologies.

Yes XOR requires the bits to be different to produce a '1' output.
Thanks Bob.

But the XOR will still set the PSW according to the result (from Ford handbook) as per the R47 orb.
So I reckon it's not just to waste time...

so for example ORB R9, 0; (and XORB R9, 0;) followed buy a JNE would work to see if any interrupts are pending.
(note that the bins use various tricks to check the pending bits, not always this one)

[jsa]

Thank you Gents.

TVRfan, chasing your suggestion of PSW flag changes, in this case following the code leads to JNB's (flag agnostic) or other flag altering opcodes. All paths seem to have psw altering opcodes followed by some conditional.

Reviewing the Ford handbook some more, I see both orb and xrw Clear V and C flags. Going backwards in code R66++ could set V and C but I'm not seeing a purpose for clearing them, with orb or xrw again afterwards, that matters when following through the code to the conditionals.

Code: Select all

572e: 07,66               incw  R66              R66++;                    
5730: 91,00,47            orb   R47,0            R47 |= 0;                         # no change???
5733: a0,46,58            ldw   R58,R46          R58 = R46;
5736: 85,00,00,58         xrw   R58,0            R58 ^= 0;                         # no change???
573a: b0,58,02            ldb   R2,R58           LSO_Port = R58;
573d: b0,59,03            ldb   R3,R59           LIO_Port = R59;
5740: 33,d4,29            jnb   B3,Rd4,576c      if (B3_Rd4 = 0) goto 576c ;       ### psw flag agnostic
     # Continue B3_Rd4=1
5743: a0,d0,58            ldw   R58,Rd0          R58 = Rd0;
5746: 05,58               decw  R58              R58--;                            ### psw flags altered
5748: d2,0f               jgt   5759             if (R58 > 0) goto 5759 ;          # Hop to L57CC

5759: 20,71               sjmp  57cc             goto 57cc ;

     # Jump from L5740 B3_Rd4=0
576c: 3a,2b,03            jb    B2,R2b,5772      if (B2_R2b = 1) goto 5772 ;       ### psw flag agnostic
576f: e7,5d,00            jump  57cf             goto 57cf ;

     # Jump from L576C B2_R2B=1
5772: 71,fb,2b            an2b  R2b,fb           B2_R2b = 0;                       # B2 Clear 0
5775: 3d,d4,11            jb    B5,Rd4,5789      if (B5_Rd4 = 1) goto 5789 ;       ### psw flag agnostic



    # Jump From L5775 B5_RD4=1
5789: 71,df,d4            an2b  Rd4,df           B5_Rd4 = 0;                       # B5 Clear 0
578c: 91,08,d4            orb   Rd4,8            Rd4 = 1;                          ### psw flag altering  # B3 Set 1


57cc: c0,d0,58            stw   R58,Rd0          Rd0 = R58;

     # Jump from L576C B2_R2B=0
57cf: 31,ea,37            jnb   B1,Rea,5809      if (B1_Rea = 1)  {
57d2: b1,06,5a            ldb   R5a,6            R5a = 6;
57d5: 71,f7,ea            an2b  Rea,f7          B3_Rea = 0;                        # B3 Clear 0
57d8: 36,de,06            jnb   B6,Rde,57e1      if (B6_Rde = 1)  {
57db: 91,08,ea            orb   Rea,8            B3_Rea = 1;                       # B3 Set 1
57de: 95,10,5a            xorb  R5a,10           R5a ^= 10; }                      # xor6,10=16 0001 0110

     # Jump from L57D8 B6_Rde=0
57e1: af,6a,7b,5c         ldzbw R5c,[R6a+7b]     WR5c = 1fb;
57e5: 17,5c               incb  R5c              R5c++;                            ### psw flag altering
57e7: c7,6a,7b,5c         stb   R5c,[R6a+7b]     1fb = R5c;
57eb: 9d,0a,5c            divb  R5c,a            R5c = WR5c / a;                   ### psw flag altering
57ee: e0,5d,10            djnz  R5d,5801         R5d--;
                                                 if (R5d != 0) goto 5801 ;

     # Jump from L57CF
5809: 65,a1,01,62         ad2w  R62,1a1          HSO_Last += C214FIL;              ### psw flag altering

Any further thoughts appreciated.

[sailorbob]

For clarity, it is only with respect to the line at 0x5736 that I meant it was possibly there to waste some state times and not as a rule to be observed for all instances of XOR'ing with a zero.

[jsa]

Understood sailorbob. So Line 5730 to clear a couple flags and Line 5736 to waste a little time?

Any thoughts on why the time needs to be wasted?

[tvrfan]

Thanks for the code example.
Yes that code seems weird.
So it's not my suggestion of a PSW check....OK.

er ..... a mystery then.

I know that some things DO appear to have time sync/delay requirements from the code.
Here's one from xdt2 (8065 CPU)

Code: Select all

8246e: 90,35,34           orb   R34,R35          R34 |= R35;
82471: f2                 pushp                  push(PSW);
82472: fa                 di                     disable ints;
82473: c4,15,34           stb   R34,R15          LSSO_A = R34;
82476: c4,1d,38           stb   R38,R1d          LSSO_D = R38;
82479: c4,19,37           stb   R37,R19          LSSO_C = R37;
8247c: c4,17,36           stb   R36,R17          LSSO_B = R36;
8247f: 08,0d,00           shrw  R0,d             R0 >>= d;                         ## R0 /= 8192 
82482: 94,35,34           xorb  R34,R35          R34 ^= R35;
82485: c4,15,34           stb   R34,R15          LSSO_A = R34;
82488: 08,09,00           shrw  R0,9             R0 >>= 9;                         ## R0 /= 512 
8248b: 08,09,00           shrw  R0,9             R0 >>= 9;                         ## R0 /= 512 
8248e: f3                 popp                   PSW = pop();
8248f: f0                 ret                    return;

those R0 shifts are clearly time delays, there's no other explanation I can see.

[jsa]

Thanks for the example, that is a neat configurable way to use time.

[sailorbob]

OK, from some rummaging around I now think this particular example of OR'ing and XOR'ing with a zero relates to how the BiDi port works at the hardware level. I suspect it's a hangover from programming the port directly rather via a 'image' variable. See the 1985 Intel Microcontroller Handbook section 3.7.1 for more information.

[jsa]

Thanks for the suggestion sailorbob. Food for thought.